Integrated circuits are fabricated using photolithographic techniques, where an image is exposed and patterned into a layer of photoresist, and then either an underlying layer is modified in some manner, or an overlying layer is formed, with sections being lifted off with the removal of the photoresist. This basic patterning step is repeated over and over again, until the integrated circuit is completed. As the term is used herein, integrated circuit includes devices such as those formed on monolithic semiconducting substrates, such as those formed of group IV materials like silicon or germanium, or group III-V compounds like gallium arsenide, or mixtures of such materials. The term includes all types of devices formed, such as memory and logic, and all designs of such devices, such as MOS and bipolar. The term also comprehends applications such as flat panel displays, solar cells, and charge coupled devices.
As the size of integrated circuits continues to decrease, new problems are encountered—or known problems become more severe, and new methods must be developed. For example, features sizes are reducing to the point where the exposing wavelengths of light need to be reduced, because the feature sizes are smaller than the larger wavelengths that had been used in the past. Such small feature sizes tend to require a mask that is highly engineered. Whereas in times past a mask could be formed having opaque features of the same size and shape as those desired to be printed onto the integrated circuit substrate, masks for the smaller features sizes need to account for a wide variety of edge and other effects in blocking and passing the radiation that is used to expose the photoresist.
What is needed, therefore, are new methods and equipment that permit a fine control to be applied to the exposure of such small feature size structures.